ALLNET / TPS FPGA Silicon Development Platform

ALLNET / TPS FPGA Silicon Development Platform
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Hightlights: Xinlinx FPGA - XCVU9P-L2FSGD2104E (VCCINT operation voltage 0.698V~0.876V)... mehr
Produktinformationen "ALLNET / TPS FPGA Silicon Development Platform"

Hightlights:

  • Xinlinx FPGA - XCVU9P-L2FSGD2104E (VCCINT operation voltage 0.698V~0.876V)
  • System Logic Cells (K):2,586
  • DSP Slices:6,840
  • Memory (Mb):345.9
  • GTY 32.75Gb/s Transceivers:76
  • I/O:676

Power & Thermal

  • Support 2 ATX PCIe Power Connector(4X2,4X2),12V/300W Power Input

    • No need power from PCIe slot or PCIe Riser Card
  • Efficiently Power Source
    • Special design VRM ( 8 Phases and powerful inductor) for FPGA VCCINT.
    • VCCINT : 0.7~0.8V/210A, peak up to 240A. (Voltage auto range depend on current or Bitstream)
    • MGT(GTH): 1.2V/19.2A + 0.9V/10.6A ( for 2 QSFP28 28Gbps and PCIe GEN3X16/GEN4X8)
    • DDR4 : 1.2V/18A
    • Others : 0.85V/4.5A,1.8V/7A,1.2V/2A
  • 435W Air flow heat sinker for thermal control, and no need extra water cooling cost.
    • Test under Whitefire 15GH/S 0xToken
    • VU9P -  61?C@25 ?C

Power & Thermal

  • Support 2 ATX PCIe Power Connector(4X2,4X2),12V/300W Power Input

    • No need power from PCIe slot or PCIe Riser Card
  • Efficiently Power Source
    • Special design VRM ( 8 Phases and powerful inductor) for FPGA VCCINT.
    • VCCINT : 0.7~0.8V/210A, peak up to 240A. (Voltage auto range depend on current or Bitstream)
    • MGT(GTH): 1.2V/19.2A + 0.9V/10.6A ( for 2 QSFP28 28Gbps and PCIe GEN3X16/GEN4X8)
    • DDR4 : 1.2V/18A
    • Others : 0.85V/4.5A,1.8V/7A,1.2V/2A
  • 435W Air flow heat sinker for thermal control, and no need extra water cooling cost.
    • Test under Whitefire 15GH/S 0xToken
    • VU9P -  61?C@25 ?C
    • VRM - 63?C@25 ?C
    • PCBA - 43?C@25 ?C
    • VRM - 63?C@25 ?C
    • PCBA - 43?C@25 ?C

C (Board management controller) Xilinx Zynq Z-7020

  • Software/ Bitstream developer can control/adjust VRM/Power telemetry/ temperature special application.

    • Detail software command spec please contact Talentpros System.

m-View mining machine management system

  • There are 2 ways to link up with m-View

    • Giga Ethernet
    • USB 2.0 port
  • m-View function
    • Adjust VCCINT Core power voltage and monitor
    • Power management /Over current protection and over temperature protection
    • Upload Bitstream to FPGA chip

Memory (Optional and default no install on board)

  • Support up to 4 16GB DDR4 DIMM

o   4x DDR4 16 GB, 2400(MT/s), 64-bit with error correcting code (ECC) DIMM

Bitstream Configuration

  • Support USB2.0 (A Type) to JTAG for download Bitstream file to FPGA XCUV9P.
  • Support remote upload bitstream files to SD Card via Giga Ethernet.
  • Support Micro SD Card to JTAG for download Bitstream file to FPGA XCUV9P.
    • Support up to 16 Bitstream files on SD card.
    • Support security function on SD card and binding to FPGA XCUV9P chip.

Communication & Networking

  • Two QSFP 100G Interfaces
  • Two QSFP connectors (8 GTY)
  • Two QSFP sites capable of data rates up to 28 Gb/s
  • PCIe Gen3 x 16 or Gen4 x8 via Edge Connector
  • 16-lane PCI Express (16 GTY)
  • PCIe integrated Endpoint block connectivity
    • Gen1, 2 or 3 x1/x2/x4/x8/x16
    • Gen4 x8
  • PCIe Gen1 x 1 via USB3.0 port
  • PCIe integrated Endpoint block connectivity

    • Gen1 x 1

Compatible xCU1525 Platform

  • Supported with SDAccel Development Environment for OpenCL, C, C++ and RTL
  • xCU1525’s Bitstream file can run well on TPS1525 as well. (Pin to pin Compatible)
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